1. Field of the Invention
The invention relates to circuits for generating a so-called recovered carrier associated with a stream of digital data, and generating correction signals which are utilized to cause the recovered carrier to be synchronized with the carrier frequency.
2. Brief Description of the Prior Art
There are numerous applications in which serial digital input data, in the form of a data input stream, has an underlying carrier frequency associated with it. For example, DPSK (differential phase shift keyed) modem demodulators receive an analog DPSK signal over a telephone line, and then feed that signal into an analog-to-digital converter, which provides as an output a serial digital data stream as an input to other modem demodulator circuitry. In order to suitably process the various signals within the DPSK demodulator, it is necessary to have signals (which can be called recovered carrier signals) which are synchronized with the underlying carrier frequency associated with the serial digital DPSK data stream. Similarly, any digital circuit which receives a digital data stream input having an underlying carrier frequency may need a means of producing a synchronized recovered carrier signal. Another example is a PSK (phase shift keyed) system, wherein the PSK waveform is inputted to an A/D converter; the digital output, if it is in serial form, will have an underlying carrier frequency, which may need to be recovered. Prior approaches to generating such a recovered carrier signal have utilized a voltage controlled oscillator (voltage controlled oscillators are well known in the art) in conjunction with linear filters, active filters, and other analog circuits which generate linear or analog signals which are utilized as voltage control inputs to the voltage controlled oscillator. The output of the voltage controlled oscillator is conventionally compared with an incoming signal by means of a phase detector, which generates a signal indicative of whether an advancing or retardation of the recovered carrier signal is required to synchronize it with the underlying carrier. This error signal is applied to the above mentioned linear type of filter. Such prior art devices which require linear filters, summing amplifiers, etc. which utilize linear circuitry have not been capable of integration on a single LSI (large scale integrated) chip. Also, such linear circuits have time drift which are typical of R, L, and C components. Consequently, periodic calibration is required.